使用查找表级联模拟器的快速逻辑模拟器

Hiroki Nakahara, Tsutomu Sasao, M. Matsuura
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引用次数: 4

摘要

提出了一种利用查找表级联仿真器实现基于周期的逻辑仿真的新方法。该方法首先通过二进制决策图(BDD)将给定电路转换为LUT级联。然后,它将LUT数据存储到LUT级联模拟器的内存中。然后,生成表示LUT级联仿真器控制电路的C代码。最后,它将C代码转换为执行代码。在模拟时间和设置时间方面,将该方法与水平编译代码(LCC)模拟器进行了比较。虽然我们使用标准PC机对电路进行了仿真,但实验结果表明,该方法比LCC方法快12-64倍
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A fast logic simulator using a look up table cascade emulator
This paper shows a new type of a cycle-based logic simulation method using a look-up table (LUT) cascade emulator. The method first transforms a given circuit into LUT cascades through BDD (binary decision diagram). Then, it stores LUT data to the memory of an LUT cascade emulator. Next, it generates the C code representing the control circuit of the LUT cascade emulator. And, finally, it converts the C code into the execution code. This method is compared with a levelized compiled code (LCC) simulator with respect to the simulation time and setup time. Although we used standard PC to simulate the circuit, experimental results show that this method is 12-64 times faster than the LCC
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