新版本FERMI通道芯片的容错平衡:功能评估

Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 1996-11-06 DOI:10.1109/DFTVS.1996.572031

A. Antola, L. Breveglieri

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引用次数: 2

摘要

FERMI微系统的“通道芯片”原型已经设计和制造(版本1,1994)，目前正在测试中(1995- 1996)。未来的实现(版本11,1996)需要对芯片进行结构优化和尺寸减小。这些修改需要对已实现的容错特性进行重新分配和重新设计。本文提出了这项任务的指导方针，并讨论了一项建议。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Balancing of fault tolerance in the new version of the FERMI Channel chip: a functional evaluation

A prototype of the "Channel chip" of the FERMI microsystem has been designed and fabricated (version 1, 1994), being currently under test (1995-96). Future implementations (version 11, 1996) require a structural refinement and a reduction of dimension of the chip. These modifications require in turn a redistribution and a redesign of the implemented fault tolerance features. In this paper guide-lines for this task are presented and a proposal is discussed.

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Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

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