Digital predistorter design using linear spline and its fixed point implementation

This paper investigates digital predistorter design using linear splines polynomial (LSP) and its implementation in 16-bit fixed point FPGA. The performance of memory polynomial model in fixed point implementation degrades, and LSP model has been proposed as a solution. The performance is evaluated in terms of simulation and measured result. It has been reported that we achieve numerically stable observation matrices using splines, hence accuracy level of coefficients is sufficient to cover full dynamic range in FPGA.