采用3DIC 300mm后置TSV工艺集成在逻辑控制器上实现内存堆叠

2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2016-04-25 DOI:10.1109/VLSI-TSA.2016.7480522

Shang-Chun Chen, P. Tzeng, Yu-Chen Hsm, Chung-Chih Wang, Po-Chih Chang, Jui-Chm Chen, Yiu-Hsiang Chang, Tsuen-Sung Chen, T. Hsu, Hsiang-Hung Chang, C. Zhan, Chia-Hsin Lee, Yung-Fa Chou, D. Kwai, T. Ku, Pei-Hua Wang, W. Lo

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引用次数: 3

摘要

开发了BTSV 3DIC 300mm制程集成技术，并将其应用于工业合作和量产商业模式视角。在本工作中，公开了一种成功的BTSV工艺集成，并应用于65nm逻辑控制器/45nm DRAM堆叠结构。讨论了BTSV形成和薄晶片处理的关键使能工艺技术。电学测量数据和功能逻辑电路测试表明了BTSV集成的实用性。

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Implementation of memory stacking on logic controller by using 3DIC 300mm backside TSV process integration

Technologies of backside via-last TSV (BTSV) 3DIC 300mm process integration are developed to be applied in industry cooperation and mass production business model view. In this work, a successful BTSV process integration is disclosed and applied on 65nm logic controller/45nm DRAM stacking structure. Key enabling process technologies in BTSV formation and thin wafer handling are discussed. The electrical measurement data and functional logic circuit test show the practicability of BTSV integration.

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2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

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