H.264和HEVC运动估计近似电路的比较

Waqar Ahmad, Berke Ayrancioglu, Ilker Hamzaoglu
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引用次数: 5

摘要

运动估计是视频编码器硬件中计算量最大、功耗最大的模块。近似硬件可以实现比精确硬件更好的性能、面积和功耗,同时为容错应用提供可接受的质量。本文提出了一种近似加法器。对几种近似电路进行了详细的比较,包括提出的近似加法器和传统的H.264和HEVC运动估计的位截断技术。所提出的近似加法器在运动估计硬件中实现了高达10%的功耗降低,同时提供了比其他近似电路更好的质量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Comparison of Approximate Circuits for H.264 and HEVC Motion Estimation
Motion estimation is the most computationally complex and power consuming module in video encoder hardware. Approximate hardware can achieve better performance, area and power consumption than accurate hardware while providing acceptable quality for error tolerant applications. In this paper, an approximate adder is proposed. Detailed comparison of several approximate circuits including the proposed approximate adder and traditional bit truncation technique for H.264 and HEVC motion estimation is presented. The proposed approximate adder achieved up to 10% power reduction in motion estimation hardware while providing better quality than the other approximate circuits.
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