Min-Sang Park, C. Kang, D. Choi, C. Sohn, E. Jeong, Jinyong Chung, Jeong-Soo Lee, Y. Jeong
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Reliability properties in sub-50nm high performance high-k/metal gate stacks SiGe pMOSFETs
We present the reliabilities in compressively strained SiGe channel pMOSFETs. A Si capping layer in SiGe channel pMOSFETs improved the negative bias temperature instability (NBTI) without device performance degradation. Also, the Si capped device exhibits the better NBTI reliability than the Si channel device. Because a Si capped structure forms the double barrier layer in the interface, it is the primary cause of improved NBTI. These results show that a Si capping layer should be used in SiGe channel pMOSFETs for better reliabilities and performance.
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