{"title":"用于单电子电路仿真的SPICE宏观模型","authors":"M. Karimian, M. Dousti, M. Pouyan, R. Faez","doi":"10.1109/ICM.2009.5418646","DOIUrl":null,"url":null,"abstract":"In this paper we have proposed a new and more accurate macro-model for simulation of single electron transistors (SETs). Furthermore, this model includes the ability of electron tunneling time calculation. In our proposed model, we have modified the previous models and applied some basic corrections to their formulas. In addition to achievement of more accuracy, we have added a switched capacitor circuit, as a quantizer, to evaluate the time of electron tunneling through the barrier. We used HSPICE for high-speed simulation and observed that our macro-model gives more accurate results than of the other models when compare with SIMON 2.0. This model is completely applicable for calculating the delay time of complicated circuits.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"A new SPICE macro-model for simulation of single electron circuits\",\"authors\":\"M. Karimian, M. Dousti, M. Pouyan, R. Faez\",\"doi\":\"10.1109/ICM.2009.5418646\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we have proposed a new and more accurate macro-model for simulation of single electron transistors (SETs). Furthermore, this model includes the ability of electron tunneling time calculation. In our proposed model, we have modified the previous models and applied some basic corrections to their formulas. In addition to achievement of more accuracy, we have added a switched capacitor circuit, as a quantizer, to evaluate the time of electron tunneling through the barrier. We used HSPICE for high-speed simulation and observed that our macro-model gives more accurate results than of the other models when compare with SIMON 2.0. This model is completely applicable for calculating the delay time of complicated circuits.\",\"PeriodicalId\":391668,\"journal\":{\"name\":\"2009 International Conference on Microelectronics - ICM\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference on Microelectronics - ICM\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2009.5418646\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Microelectronics - ICM","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2009.5418646","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new SPICE macro-model for simulation of single electron circuits
In this paper we have proposed a new and more accurate macro-model for simulation of single electron transistors (SETs). Furthermore, this model includes the ability of electron tunneling time calculation. In our proposed model, we have modified the previous models and applied some basic corrections to their formulas. In addition to achievement of more accuracy, we have added a switched capacitor circuit, as a quantizer, to evaluate the time of electron tunneling through the barrier. We used HSPICE for high-speed simulation and observed that our macro-model gives more accurate results than of the other models when compare with SIMON 2.0. This model is completely applicable for calculating the delay time of complicated circuits.