E. Atmaca, N. Drego, D. Boning, C. Fonstad, L. W. Khai, Y. S. Fatt
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RM/sup 3/ integration of indium phosphide based 1.55 /spl mu/m p-i-n photodetectors with silicon CMOS optical clock receiver circuits
Describes the development of an RM/sup 3/ technique, Aligned pillar bonding (APB), and its application to optical clock distribution. APB integrates lattice mismatched materials using aligned, selective area wafer bonding at reduced temperature (around 300/spl deg/C), which protects the electronic chips from the adverse effects of high temperatures, and reduces the thermal expansion mismatch concerns.