GaP源漏式SOI 1T-DRAM:解决关键技术挑战

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) Pub Date : 2013-10-01 DOI:10.1109/S3S.2013.6716573

A. Pal, A. Nainani, Z. Ye, X. Bao, E. Sanchez, K. Saraswat

{"title":"GaP源漏式SOI 1T-DRAM:解决关键技术挑战","authors":"A. Pal, A. Nainani, Z. Ye, X. Bao, E. Sanchez, K. Saraswat","doi":"10.1109/S3S.2013.6716573","DOIUrl":null,"url":null,"abstract":"SOI based GaP source drain 1T DRAM with silicon channel is proposed. Using BJT-latch based programing, it is shown that the scalability of GaP-SD 1T-DRAM can be extended up to 20nm. Nickel alloying of GaP is proposed as a method to reduce the sheet and contact resistance of GaP source and drain. Using nickel alloying, the ON-current of the GaP-SD transistor is improved by an order and the proper scalability behavior is established.","PeriodicalId":219932,"journal":{"name":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"GaP source-drain SOI 1T-DRAM: Solving the key technological challenges\",\"authors\":\"A. Pal, A. Nainani, Z. Ye, X. Bao, E. Sanchez, K. Saraswat\",\"doi\":\"10.1109/S3S.2013.6716573\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SOI based GaP source drain 1T DRAM with silicon channel is proposed. Using BJT-latch based programing, it is shown that the scalability of GaP-SD 1T-DRAM can be extended up to 20nm. Nickel alloying of GaP is proposed as a method to reduce the sheet and contact resistance of GaP source and drain. Using nickel alloying, the ON-current of the GaP-SD transistor is improved by an order and the proper scalability behavior is established.\",\"PeriodicalId\":219932,\"journal\":{\"name\":\"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/S3S.2013.6716573\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2013.6716573","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

提出了一种基于SOI的硅通道GaP源漏1T DRAM。利用基于bjt锁存器的编程，证明了GaP-SD 1T-DRAM的可扩展性可以扩展到20nm。提出了一种降低GaP源极和漏极的片阻和接触电阻的方法。采用镍合金使GaP-SD晶体管的导通电流提高了一个数量级，并建立了良好的可扩展性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

GaP source-drain SOI 1T-DRAM: Solving the key technological challenges

SOI based GaP source drain 1T DRAM with silicon channel is proposed. Using BJT-latch based programing, it is shown that the scalability of GaP-SD 1T-DRAM can be extended up to 20nm. Nickel alloying of GaP is proposed as a method to reduce the sheet and contact resistance of GaP source and drain. Using nickel alloying, the ON-current of the GaP-SD transistor is improved by an order and the proper scalability behavior is established.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

自引率

0.00%

发文量