{"title":"非均匀芯片温度相关的信号完整性","authors":"A. Ajami, K. Banerjee, Massoud Pedram","doi":"10.1109/VLSIT.2001.934991","DOIUrl":null,"url":null,"abstract":"In traditional design flows, the chip temperature is assumed to be uniform across the substrate. However, for most high-performance designs, the substrate temperature is nonuniform, which can be a major source of inaccuracy in delay and skew computations. This paper introduces the analysis and modeling of nonuniform substrate temperature and its effect on signal integrity. Using a novel nonuniform temperature-dependent analytical distributed RC interconnect delay model, the thermally dependent signal integrity metrics, i.e. signal delay and clock skew, are analyzed and some design techniques are provided to eliminate the nonuniform temperature-dependent clock skew.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Non-uniform chip-temperature dependent signal integrity\",\"authors\":\"A. Ajami, K. Banerjee, Massoud Pedram\",\"doi\":\"10.1109/VLSIT.2001.934991\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In traditional design flows, the chip temperature is assumed to be uniform across the substrate. However, for most high-performance designs, the substrate temperature is nonuniform, which can be a major source of inaccuracy in delay and skew computations. This paper introduces the analysis and modeling of nonuniform substrate temperature and its effect on signal integrity. Using a novel nonuniform temperature-dependent analytical distributed RC interconnect delay model, the thermally dependent signal integrity metrics, i.e. signal delay and clock skew, are analyzed and some design techniques are provided to eliminate the nonuniform temperature-dependent clock skew.\",\"PeriodicalId\":232773,\"journal\":{\"name\":\"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2001.934991\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934991","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Non-uniform chip-temperature dependent signal integrity
In traditional design flows, the chip temperature is assumed to be uniform across the substrate. However, for most high-performance designs, the substrate temperature is nonuniform, which can be a major source of inaccuracy in delay and skew computations. This paper introduces the analysis and modeling of nonuniform substrate temperature and its effect on signal integrity. Using a novel nonuniform temperature-dependent analytical distributed RC interconnect delay model, the thermally dependent signal integrity metrics, i.e. signal delay and clock skew, are analyzed and some design techniques are provided to eliminate the nonuniform temperature-dependent clock skew.