90μW 15位ΔΣ数字音频ADC

ESSCIRC 2007 - 33rd European Solid-State Circuits Conference Pub Date : 2007-09-01 DOI:10.1109/ESSCIRC.2007.4430279

S. Pavan, N. Krishnapura, Ramalingam Pandarinathan, P. Sankar

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引用次数: 11

摘要

给出了一种15位音频连续时间δ σ调制器(CTDSM)的结构、电路设计细节和测量结果。该转换器采用0.18 μ m CMOS技术设计，在24 kHz带宽下实现93.5 dB的动态范围，在1.8 V电源下功耗为90 muW。它具有一个三阶有源rc环路滤波器，一个非常低功耗的4位闪光量化器和一个有效的多余延迟补偿方案，以降低功耗。

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A 90μW 15-bit ΔΣ ADC for digital audio

Architecture, circuit design details and measurement results for a 15 bit audio continuous-time DeltaSigma modulator (CTDSM) are given. The converter, designed in a 0.18 mum CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 muW from a 1.8 V supply. It features a third order active-RC loop filter, a very low power 4-bit flash quantizer and an efficient excess delay compensation scheme to reduce power dissipation.

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ESSCIRC 2007 - 33rd European Solid-State Circuits Conference

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