{"title":"超低环金线键合技术在超薄(Jedec封装外形高度子码“X2”)四平无引线封装(QFN)中的应用","authors":"Tan Boo Wei, Wang Lei, K. Niu, Lu Hai Long","doi":"10.1109/IEMT.2008.5507845","DOIUrl":null,"url":null,"abstract":"Quad Flat No Lead Package (QFN) with “Super Thin” package height of 0.3 to 0.4 mm (package profile height sub code “X2” per Jedec Standard) is designed with limited vertical space for wire loop height. Typical package construction consists of leadframe thickness, chip and chip attach adhesive thickness, mold (encapsulation) thickness left only 75 to 100 um (3 to 4 mils) space between chip surface and package surface which is available for wire bonding . Therefore wire bonding loop height in QFN-X2 package are typically controlled within less than 100um (4mils) as measured from chip surface to highest point of wire loop . Typically there are 3 areas to consider when developing gold wire bond techniques to achieve low loop height: 1. Stress level at the heat affected zone near wire exit above ball (1st bonds). 2. Consistency of wire loop height across all wires within same package. 3. Resistance to mold flow sweeping during molding (encapsulation process). There are two common wire bond techniques available to achieve wire loop height less than 100um (4mils) - bond stitch on ball (BSOB) and ultra low loop (ULL) forward bonding. This paper discusses the comparative performance and limitations of both wire bond techniques .","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Application Of Ultra Low Loop gold wire bonding technique in Super Thin (Jedec Package Profile Height Sub Code “X2”) Quad Flat No Lead Package (QFN)\",\"authors\":\"Tan Boo Wei, Wang Lei, K. Niu, Lu Hai Long\",\"doi\":\"10.1109/IEMT.2008.5507845\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Quad Flat No Lead Package (QFN) with “Super Thin” package height of 0.3 to 0.4 mm (package profile height sub code “X2” per Jedec Standard) is designed with limited vertical space for wire loop height. Typical package construction consists of leadframe thickness, chip and chip attach adhesive thickness, mold (encapsulation) thickness left only 75 to 100 um (3 to 4 mils) space between chip surface and package surface which is available for wire bonding . Therefore wire bonding loop height in QFN-X2 package are typically controlled within less than 100um (4mils) as measured from chip surface to highest point of wire loop . Typically there are 3 areas to consider when developing gold wire bond techniques to achieve low loop height: 1. Stress level at the heat affected zone near wire exit above ball (1st bonds). 2. Consistency of wire loop height across all wires within same package. 3. Resistance to mold flow sweeping during molding (encapsulation process). There are two common wire bond techniques available to achieve wire loop height less than 100um (4mils) - bond stitch on ball (BSOB) and ultra low loop (ULL) forward bonding. This paper discusses the comparative performance and limitations of both wire bond techniques .\",\"PeriodicalId\":151085,\"journal\":{\"name\":\"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)\",\"volume\":\"106 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2008.5507845\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2008.5507845","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Application Of Ultra Low Loop gold wire bonding technique in Super Thin (Jedec Package Profile Height Sub Code “X2”) Quad Flat No Lead Package (QFN)
Quad Flat No Lead Package (QFN) with “Super Thin” package height of 0.3 to 0.4 mm (package profile height sub code “X2” per Jedec Standard) is designed with limited vertical space for wire loop height. Typical package construction consists of leadframe thickness, chip and chip attach adhesive thickness, mold (encapsulation) thickness left only 75 to 100 um (3 to 4 mils) space between chip surface and package surface which is available for wire bonding . Therefore wire bonding loop height in QFN-X2 package are typically controlled within less than 100um (4mils) as measured from chip surface to highest point of wire loop . Typically there are 3 areas to consider when developing gold wire bond techniques to achieve low loop height: 1. Stress level at the heat affected zone near wire exit above ball (1st bonds). 2. Consistency of wire loop height across all wires within same package. 3. Resistance to mold flow sweeping during molding (encapsulation process). There are two common wire bond techniques available to achieve wire loop height less than 100um (4mils) - bond stitch on ball (BSOB) and ultra low loop (ULL) forward bonding. This paper discusses the comparative performance and limitations of both wire bond techniques .