基于二元决策图的电路验证的良好输入顺序

Euro ASIC '91 Pub Date : 1991-05-27 DOI:10.1109/EUASIC.1991.212832

G. Saucier, F. Poirot

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引用次数: 3

摘要

标准单元逻辑的验证方法基于二进制决策图(BDD)比较。参考布尔方程和标准单元逻辑网络都用有序bdd (obdd)表示。主要问题是找到一个好的输入顺序，以减少bdd中的节点数量和构建和比较它们所需的计算时间。

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A good input ordering for circuit verification based on binary decision diagrams

Verification methods for standard cell logic are based on binary decision diagrams (BDD) comparison. The reference Boolean equations as well as the network of standard cell logic are represented by ordered BDDs (OBDDs). The main issue is to find a good input ordering to reduce both the number of nodes in the BDDs and the computation time needed to construct as well as to compare them.<>

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Euro ASIC '91

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