基于收缩阵列的AI加速器的gpu加速时序仿真

S. Holst, Lim Bumun, X. Wen
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引用次数: 1

摘要

收缩阵列目前用于自动驾驶汽车等自主系统,以加速深度神经网络推断所需的大量矩阵运算。这种加速器的可靠性至关重要,因为由于错误计算而导致的深度神经网络精度的任何损失都可能产生可怕的后果。我们提出了一种测量收缩阵列中任意时序故障引起的精度损失的新方法。我们基于gpu的仿真系统首次实现了对大型收缩阵列上所有与推断相关的矩阵操作的完整和准确的时序模拟。单个消费级GPU可以模拟LeNet-5,每次推理的吞吐量约为13秒。此外,我们的模拟方法很容易扩展到更大的dnn和多个gpu。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
GPU-Accelerated Timing Simulation of Systolic-Array-Based AI Accelerators
Systolic arrays are currently used in autonomous systems such as self-driving cars to accelerate the enormous amount of matrix operations necessary for DNN inference. The reliability of such accelerators are of utmost importance since any loss in DNN accuracy due to erroneous calculations can have dire consequences. We propose a novel method to measure accuracy losses caused by arbitrary timing faults in systolic arrays. Our GPU-based simulation system enables for the first time a complete and accurate timing simulation of all inference-related matrix operations on large systolic arrays. A single consumer-grade GPU can simulate a LeNet-5 at a throughput of about 13s per inference. Furthermore, our simulation approach readily scales to larger DNNs and multiple GPUs.
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