Schrödinger-Poisson和蒙特卡罗分析III-V型mosfet的高频和低功耗应用

Ming Shi, J. Saint-Martin, A. Bournel, P. Dollfus
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引用次数: 2

摘要

具有高κ栅极介电堆的III-V型MOSFET(金属氧化物半导体场效应晶体管)不仅可以提高微波性能,还可以提高低电源电压逻辑电路的性能。这可以满足智能应用的高速和低功耗规格。事实上,结合标准mosfet的弱栅漏和hemt(高电子迁移率晶体管)的良好射频性能,它们可以优于路线图末端标准Si-MOSFET。利用全2D Poisson-Schrödinger求解器和半经典集成蒙特卡罗器件模拟器,研究了各种50nm MOSFET和HEMT的栅极电荷控制以及静态和动态I-V性能。特别是,Y参数是从时变电流中仔细提取的。通过比较研究,我们提出了一种在低功耗下具有高频性能的优化III-V纳米fet架构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Schrödinger-Poisson and Monte Carlo analysis of III–V MOSFETs for high frequency and low consumption applications
III–V MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with high-κ gate dielectric stack appears as a viable alternative to enhance not only microwave performance but also logic circuits with low supply voltage. This allows fulfilling high-speed and low-power specifications for intelligent applications. Indeed, combining weak gate leakage of standard MOSFETs and good RF performance of HEMTs (High Electron Mobility Transistors), they could outperform end-of-roadmap standard Si-MOSFET. Using full 2D Poisson-Schrödinger solver and a semi-classical Ensemble Monte Carlo device simulator, various 50nm MOSFET and HEMT are investigated in terms of gate charge control and both static and dynamic I–V performance. In particular, Y parameters are carefully extracted from time-varying currents. This comparative study allows us to propose an optimized III–V nano-FET architecture with high-frequency performance under low power supply.
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