一种亚皮秒分辨率0.5-1.5GHz数相转换器

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. Pub Date : 2006-06-15 DOI:10.1109/VLSIC.2006.1705319

P. Hanumolu, V. Kratyuk, Gu-Yeon Wei, U. Moon

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引用次数: 12

摘要

工作频率为0.5-1.5GHz的数相转换器采用过采样、噪声整形和DLL相位滤波技术，实现了与工作频率无关的次ps分辨率。在0.13 μ m CMOS工艺中制造的测试芯片实现了低于plusmn100fs和plusmn12ps INL的DNL，在1GHz工作时消耗15mW

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A Sub-Picosecond Resolution 0.5-1.5GHz Digital-to-Phase Converter

A digital-to-phase converter operating from 0.5-1.5GHz employs oversampling, noise shaping and DLL phase filtering to achieve sub-ps resolution independent of the operating frequency. Test chip fabricated in a 0.13mum CMOS process achieves a DNL below plusmn100fs and plusmn12ps INL and consumes 15mW while operating at 1GHz

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来源期刊

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.

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