{"title":"120nm CMOS OPAMP, 690 MHz f/sub /和128 dB DC增益","authors":"Franz Schlögl, H. Zimmermann","doi":"10.1109/ESSCIR.2005.1541607","DOIUrl":null,"url":null,"abstract":"In this paper, an advancement to compensate multistage operational amplifiers is presented. High-gain and highspeed operational amplifiers can be realized with this approach. One example of such a high-gain amplifier with a unity-gain frequency of 693 MHz and DC gain of 128.8dB is presented. The high-speed settling is mainly reached by dominant Miller compensation via 4 stages.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"120nm CMOS OPAMP with 690 MHz f/sub T/ and 128 dB DC gain\",\"authors\":\"Franz Schlögl, H. Zimmermann\",\"doi\":\"10.1109/ESSCIR.2005.1541607\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, an advancement to compensate multistage operational amplifiers is presented. High-gain and highspeed operational amplifiers can be realized with this approach. One example of such a high-gain amplifier with a unity-gain frequency of 693 MHz and DC gain of 128.8dB is presented. The high-speed settling is mainly reached by dominant Miller compensation via 4 stages.\",\"PeriodicalId\":239980,\"journal\":{\"name\":\"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIR.2005.1541607\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIR.2005.1541607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
120nm CMOS OPAMP with 690 MHz f/sub T/ and 128 dB DC gain
In this paper, an advancement to compensate multistage operational amplifiers is presented. High-gain and highspeed operational amplifiers can be realized with this approach. One example of such a high-gain amplifier with a unity-gain frequency of 693 MHz and DC gain of 128.8dB is presented. The high-speed settling is mainly reached by dominant Miller compensation via 4 stages.