{"title":"DSP架构、算法和代码生成:裂变还是融合?","authors":"R. Simar","doi":"10.1109/ICISS.1997.630264","DOIUrl":null,"url":null,"abstract":"Continuing dramatic improvements in semiconductor manufacturing processes are enabling radical new signal-processing architectures at the chip level. The development of these new architectures must be coupled, a fusion, with clearly defined target applications, a thorough analysis of applicable signal processing algorithms, and significant advancements in code-generation technology. The TMS320C6x development program involved the codevelopment of the VelociTI architecture, a new code-generation environment, and a large set of representative benchmarks.","PeriodicalId":357602,"journal":{"name":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"DSP architectures, algorithms, and code-generation: fission or fusion?\",\"authors\":\"R. Simar\",\"doi\":\"10.1109/ICISS.1997.630264\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Continuing dramatic improvements in semiconductor manufacturing processes are enabling radical new signal-processing architectures at the chip level. The development of these new architectures must be coupled, a fusion, with clearly defined target applications, a thorough analysis of applicable signal processing algorithms, and significant advancements in code-generation technology. The TMS320C6x development program involved the codevelopment of the VelociTI architecture, a new code-generation environment, and a large set of representative benchmarks.\",\"PeriodicalId\":357602,\"journal\":{\"name\":\"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-10-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICISS.1997.630264\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICISS.1997.630264","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
DSP architectures, algorithms, and code-generation: fission or fusion?
Continuing dramatic improvements in semiconductor manufacturing processes are enabling radical new signal-processing architectures at the chip level. The development of these new architectures must be coupled, a fusion, with clearly defined target applications, a thorough analysis of applicable signal processing algorithms, and significant advancements in code-generation technology. The TMS320C6x development program involved the codevelopment of the VelociTI architecture, a new code-generation environment, and a large set of representative benchmarks.