{"title":"一种用于锁相环的新型正反馈CMOS电荷泵电路","authors":"E. Juárez-Hernández, A. Díaz-Sánchez","doi":"10.1109/ICECS.2001.957751","DOIUrl":null,"url":null,"abstract":"The design and simulation of a novel CMOS charge-pump circuit for PLL applications is presented. The proposed circuit makes use of positive feedback to increase the switching speed and current reuse to minimize the power consumption. H-SPICE simulations for a 0.35 /spl mu/m AMS technology show the potential of the proposed structure for high-frequency applications.","PeriodicalId":141392,"journal":{"name":"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"37","resultStr":"{\"title\":\"A novel CMOS charge-pump circuit with positive feedback for PLL applications\",\"authors\":\"E. Juárez-Hernández, A. Díaz-Sánchez\",\"doi\":\"10.1109/ICECS.2001.957751\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and simulation of a novel CMOS charge-pump circuit for PLL applications is presented. The proposed circuit makes use of positive feedback to increase the switching speed and current reuse to minimize the power consumption. H-SPICE simulations for a 0.35 /spl mu/m AMS technology show the potential of the proposed structure for high-frequency applications.\",\"PeriodicalId\":141392,\"journal\":{\"name\":\"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)\",\"volume\":\"96 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-09-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"37\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2001.957751\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2001.957751","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel CMOS charge-pump circuit with positive feedback for PLL applications
The design and simulation of a novel CMOS charge-pump circuit for PLL applications is presented. The proposed circuit makes use of positive feedback to increase the switching speed and current reuse to minimize the power consumption. H-SPICE simulations for a 0.35 /spl mu/m AMS technology show the potential of the proposed structure for high-frequency applications.