低电压和低功耗方面的数据转换器设计

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI:10.1109/ESSDER.2004.1356478

Qiuting Huang

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引用次数: 11

摘要

在亚100纳米CMOS技术中，低电压设计正成为模拟电路在1v左右工作的一个重要问题。本文讨论了低电压对电路结构的影响，维持速度和直流增益的运放配置，共模反馈及其稳定性，开关速度，以及在给定功耗下可实现的信噪比和速度的趋势。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low voltage and low power aspects of data converter design

Low voltage design is becoming an important issue for analogue circuits expected to operate around 1 V supply in sub 100 nm CMOS technologies. This contribution discusses the impact of low voltage on circuit architecture, opamp configuration to maintain speed and DC gain, common-mode feedback and its stability, switching speed, as well as trends in achievable signal to noise ratio and speed for a given power consumption.

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Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

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