面向区块链物联网应用的灵活节能BLAKE-256/2s协处理器

Pham Hoai Luan, T. Tran, V. Le, Y. Nakashima
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引用次数: 4

摘要

由于BLAKE-256和BLAKE2s是基于区块链的物联网应用中重要的加密哈希函数,因此开发灵活且节能的BLAKE-256/2s硬件最近变得非常必要。然而,以前的BLAKE-256/2s架构在实现高灵活性和能源效率方面具有挑战性。因此,本文提出BLAKE-256/2s协处理器,为基于区块链的物联网应用实现高灵活性和高能效。提出的BLAKE-256/2s加速器采用了三种新的优化技术来实现这些目标。首先,提出了一个可配置的哈希核心,以提高灵活性。其次,提出了一种流水线排列和压缩体系结构,以提高吞吐量和硬件效率。第三,引入了一种挖掘传输机制,以优化我们的协处理器在片上系统级的性能。所提出的协处理器在Xilinx Zynq $\mathbf{UltraScale}+$ MPSoC ZCU102 FPGA上实现并验证。因此,ZCU102 FPGA上的协处理器的功耗和能效明显优于Intel i9 10940X CPU和RTX 3090 GPU。此外,在多个fpga上的实验结果表明,与基于fpga的相关产品相比,该协处理器具有更高的吞吐量、面积效率和灵活性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Flexible and Energy-Efficient BLAKE-256/2s Co-Processor for Blockchain-based IoT Applications
Developing flexible and energy-efficient BLAKE-256/2s hardware has recently become necessary since BLAKE-256 and BLAKE2s are important cryptographic hash functions in reliability and security enhancement for blockchain-based IoT applications. However, previous BLAKE-256/2s architectures are challenging in achieving high flexibility and energy efficiency. Therefore, this paper proposes the BLAKE-256/2s co-processor to achieve high flexibility and energy efficiency for blockchain-based IoT applications. The proposed BLAKE-256/2s accelerator has three novel optimization techniques to achieve those goals. First, a configurable hashing core is proposed to enhance flexibility. Second, a pipelined permutation and compression architecture are developed to improve the throughput and hardware efficiency. Third, a mining transmission mechanism is introduced to optimize the performance of our co-processor at the system-on-chip level. The proposed co-processor is implemented and verified on a Xilinx Zynq $\mathbf{UltraScale}+$ MPSoC ZCU102 FPGA. Accordingly, the power and energy efficiency of the co-processor on the ZCU102 FPGA is significantly better than the Intel i9 10940X CPU and the RTX 3090 GPU. Moreover, experimental results on several FPGAs prove that the proposed co-processor is considerably higher throughput, area efficiency, and flexibility than FPGA-based related works.
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