N. Ahmed, F. Roy, G. Lu, B. Mamdy, J. Carrere, A. Tournier, N. Virollet, C. Perrot, M. Rivoire, A. Seignard, D. Pellissier-Tanon, F. Leverd, B. Orlando
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MOS Capacitor Deep Trench Isolation for CMOS image sensors
This paper proposes the integration of MOS Capacitor Deep Trench Isolation (CDTI) as a solution to boost image sensors' pixels performances. We have investigated CDTI and compared it to oxide-filled Deep Trench Isolation (DTI) configurations, on silicon samples, with a fabrication based on TCAD simulations. The experiment measurements evaluated on CDTI without Sidewall Implantation (SWI) exhibit very low dark current (~1aA at 60°C for a 1.4μm pixel), high full-well capacity (~12000e-), and it shows quantum efficiency improvement compared to DTI configuration. Pixels with optimized CDTI gate oxide thickness have demonstrated comparable angular response to oxide-filled DTI counterparts.
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