{"title":"双栅并五苯有机场效应晶体管性能的仿真研究","authors":"Ranita Halder, A. Sarkar","doi":"10.1109/VLSIDCS47293.2020.9179743","DOIUrl":null,"url":null,"abstract":"Comparative analysis between single gate organic FET and double gate is presented in terms of performance parameters such as ON-OFF current ratio, threshold voltage VTh, mobility µ, transconductance gm, output conductance gds using TCAD device simulator. Effect of structural parameters and bias voltages on drain current is analyzed. Use of High-k dielectric and double gate configuration shows remarkable improvement in terms of higher drain current and performance parameters than single gate organic FET.","PeriodicalId":446218,"journal":{"name":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","volume":"203 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance Evaluation of Double Gate Pentacene Organic FET Using Simulation Study\",\"authors\":\"Ranita Halder, A. Sarkar\",\"doi\":\"10.1109/VLSIDCS47293.2020.9179743\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Comparative analysis between single gate organic FET and double gate is presented in terms of performance parameters such as ON-OFF current ratio, threshold voltage VTh, mobility µ, transconductance gm, output conductance gds using TCAD device simulator. Effect of structural parameters and bias voltages on drain current is analyzed. Use of High-k dielectric and double gate configuration shows remarkable improvement in terms of higher drain current and performance parameters than single gate organic FET.\",\"PeriodicalId\":446218,\"journal\":{\"name\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"volume\":\"203 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIDCS47293.2020.9179743\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS47293.2020.9179743","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance Evaluation of Double Gate Pentacene Organic FET Using Simulation Study
Comparative analysis between single gate organic FET and double gate is presented in terms of performance parameters such as ON-OFF current ratio, threshold voltage VTh, mobility µ, transconductance gm, output conductance gds using TCAD device simulator. Effect of structural parameters and bias voltages on drain current is analyzed. Use of High-k dielectric and double gate configuration shows remarkable improvement in terms of higher drain current and performance parameters than single gate organic FET.