模拟电路的最佳测试集设计

1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers Pub Date : 1990-11-11 DOI:10.1109/ICCAD.1990.129906

L. Milor, A. Sangiovanni-Vincentelli

{"title":"模拟电路的最佳测试集设计","authors":"L. Milor, A. Sangiovanni-Vincentelli","doi":"10.1109/ICCAD.1990.129906","DOIUrl":null,"url":null,"abstract":"Given the high cost of testing analog circuit functionality, it is proposed that tests for analog circuits should be designed to detect faults. An algorithm is presented that reduces functional test sets to only those that are sufficient to find out whether a circuit contains a parametric fault. Examples demonstrate that drastic reductions in test time can be achieved without sacrificing fault coverage.<<ETX>>","PeriodicalId":242666,"journal":{"name":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"76","resultStr":"{\"title\":\"Optimal test set design for analog circuits\",\"authors\":\"L. Milor, A. Sangiovanni-Vincentelli\",\"doi\":\"10.1109/ICCAD.1990.129906\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Given the high cost of testing analog circuit functionality, it is proposed that tests for analog circuits should be designed to detect faults. An algorithm is presented that reduces functional test sets to only those that are sufficient to find out whether a circuit contains a parametric fault. Examples demonstrate that drastic reductions in test time can be achieved without sacrificing fault coverage.<<ETX>>\",\"PeriodicalId\":242666,\"journal\":{\"name\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"76\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCAD.1990.129906\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1990.129906","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 76

摘要

鉴于测试模拟电路功能的高成本，建议模拟电路的测试应设计为检测故障。提出了一种算法，将功能测试集简化为足以发现电路是否包含参数故障的测试集。示例表明，在不牺牲故障覆盖率的情况下，可以实现测试时间的大幅减少。

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Optimal test set design for analog circuits

Given the high cost of testing analog circuit functionality, it is proposed that tests for analog circuits should be designed to detect faults. An algorithm is presented that reduces functional test sets to only those that are sufficient to find out whether a circuit contains a parametric fault. Examples demonstrate that drastic reductions in test time can be achieved without sacrificing fault coverage.<>

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1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers

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