3D封装中电源噪音和电线堵塞避免的模块放置

Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI:10.1109/EPEP.2004.1407563

J. Minz, S. Lim, Jinwoo Choi, M. Swaminathan

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引用次数: 6

摘要

在这项工作中，我们提出了一种自动模块放置算法，用于同时最小化3D封装的电源噪声和路由拥塞，这些噪声和拥塞严重威胁着3D封装的性能和可靠性。我们采用去耦电容插入来抑制噪声，采用三维全局路由来避免拥塞。

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Module placement for power supply noise and wire congestion avoidance in 3D packaging

In this work, we present an automatic module placement algorithm for simultaneous power supply noise and routing congestion minimization for 3D packaging that are seriously threatening the performance and reliability of 3D packaging. We employ decoupling capacitance insertion for noise suppression and 3D global routing for congestion avoidance.

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Electrical Performance of Electronic Packaging - 2004

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