随机电报噪声对SRAM电池在低于0.4 v低电压下写入稳定性的影响

2015 Symposium on VLSI Technology (VLSI Technology) Pub Date : 2015-06-16 DOI:10.1109/VLSIT.2015.7223694

Hao Qiu, T. Mizutani, Yoshiki Yamamoto, H. Makiyama, T. Yamashita, H. Oda, S. Kamohara, N. Sugii, T. Saraya, M. Kobayashi, T. Hiramoto

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引用次数: 13

摘要

对随机电报噪声(RTN)对SRAM电池在低于0.4 v工作状态下写入稳定性的影响进行了深入的测量和统计分析。对薄盒硅(SOTB)电池中n-曲线的RTN进行了监测。通过建立统计模型，发现与在高电源电压(VDD)下工作的批量SRAM单元不同，RTN降低了低于0.4 v的故障率(FBR)。讨论了在低于0.4 v时RTN产生高快堆的原因。

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Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime

The effect of random telegraph noise (RTN) on write stability of SRAM cells in sub-0.4V operation is intensively measured and statistically analyzed. RTN of N-curves in Silicon-on-Thin-BOX (SOTB) cells is monitored. By developing statistical models, it is found that, different from bulk SRAM cells operating at high supply voltage (VDD), fail bit rate (FBR) at sub-0.4V is degraded by RTN. The origin of high FBR due to RTN at sub-0.4V is discussed.

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2015 Symposium on VLSI Technology (VLSI Technology)

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