{"title":"用TCAD研究高k介电材料应变Si PMOS的电学参数","authors":"D. Mohanta, S. S. Singh","doi":"10.1109/VLSIDCS53788.2022.9811476","DOIUrl":null,"url":null,"abstract":"The strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device with high k dielectric material is presented using Silvaco ATLAS 2D simulator in this paper. The electrical parameters like DIBL, subthreshold swing, transconductance, and ratio of on current to off current are analyzed and compared with the conventional strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device. In comparison to the strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device, the proposed device is found to be better one. A decrease of 20% DIBL has been reported in the proposed device and also the subthreshold swing (SS) value close to ideal one i.e., 60mV/decade.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Study of Electrical Parameters of Strained Si PMOS with High k Dielectric Material Using TCAD\",\"authors\":\"D. Mohanta, S. S. Singh\",\"doi\":\"10.1109/VLSIDCS53788.2022.9811476\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device with high k dielectric material is presented using Silvaco ATLAS 2D simulator in this paper. The electrical parameters like DIBL, subthreshold swing, transconductance, and ratio of on current to off current are analyzed and compared with the conventional strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device. In comparison to the strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device, the proposed device is found to be better one. A decrease of 20% DIBL has been reported in the proposed device and also the subthreshold swing (SS) value close to ideal one i.e., 60mV/decade.\",\"PeriodicalId\":307414,\"journal\":{\"name\":\"2022 IEEE VLSI Device Circuit and System (VLSI DCS)\",\"volume\":\"51 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-02-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE VLSI Device Circuit and System (VLSI DCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIDCS53788.2022.9811476\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS53788.2022.9811476","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study of Electrical Parameters of Strained Si PMOS with High k Dielectric Material Using TCAD
The strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device with high k dielectric material is presented using Silvaco ATLAS 2D simulator in this paper. The electrical parameters like DIBL, subthreshold swing, transconductance, and ratio of on current to off current are analyzed and compared with the conventional strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device. In comparison to the strained Si/relaxed Si0.8Ge0.2 heterostructure PMOS device, the proposed device is found to be better one. A decrease of 20% DIBL has been reported in the proposed device and also the subthreshold swing (SS) value close to ideal one i.e., 60mV/decade.
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