Ning Li, Takeshi Inoue, T. Hirano, Jian Pang, Rui Wu, K. Okada, Hitoshi Sakane, A. Matsuzawa
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Substrate noise isolation improvement by helium-3 ion irradiation technique in a triple-well CMOS process
Helium-3 ion irradiation technique is proposed to improve silicon substrate noise isolation by creating a local semi-insulated region with a resistivity over 1kΩ-cm in low-resistive silicon substrate. Noise isolation is improved about 10dB at 2GHz after helium-3 ion irradiation in a 180-nm CMOS process. A 90% noise reduction has been achieved in the measurement results for test structures with guard rings. The noise isolation can be kept even after annealing at 200°C for 1 hour.
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