深亚微米技术[dram]器件设计方法与可靠性策略

1997 IEEE International Integrated Reliability Workshop Final Report (Cat. No.97TH8319) Pub Date : 1997-10-13 DOI:10.1109/IRWS.1997.660315

R. Divakaruni, B. El-Kareh, W. Tonti

引用次数: 1

摘要

本教程讨论了器件和工艺优化技术，可用于当前最先进的体硅DRAM技术的设计。对比了MOSFET的性能和可靠性问题。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Device design methodology and reliability strategy for deep sub-micron technology [DRAMs]

This tutorial paper discusses device and process optimization techniques that may be employed in the design of current state-of-the-art bulk silicon DRAM technology. MOSFET performance and reliability issues are contrasted.

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来源期刊

1997 IEEE International Integrated Reliability Workshop Final Report (Cat. No.97TH8319)

自引率

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