{"title":"具有20MHz信号带宽的时间交错连续时间/spl δ //spl σ /调制器","authors":"T. Caldwell, D. Johns","doi":"10.1109/ESSCIR.2005.1541656","DOIUrl":null,"url":null,"abstract":"This paper presents the first implementation results for a time-interleaved continuous-time /spl Delta//spl Sigma/ modulator. The 3rd-order low-pass modulator operates at an oversampling ratio of 5 with a time-interleaving factor of 2 at sampling frequencies of 100MHz and 200MHz. It achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A time-interleaved continuous-time /spl Delta//spl Sigma/ modulator with 20MHz signal bandwidth\",\"authors\":\"T. Caldwell, D. Johns\",\"doi\":\"10.1109/ESSCIR.2005.1541656\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the first implementation results for a time-interleaved continuous-time /spl Delta//spl Sigma/ modulator. The 3rd-order low-pass modulator operates at an oversampling ratio of 5 with a time-interleaving factor of 2 at sampling frequencies of 100MHz and 200MHz. It achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.\",\"PeriodicalId\":239980,\"journal\":{\"name\":\"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIR.2005.1541656\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIR.2005.1541656","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A time-interleaved continuous-time /spl Delta//spl Sigma/ modulator with 20MHz signal bandwidth
This paper presents the first implementation results for a time-interleaved continuous-time /spl Delta//spl Sigma/ modulator. The 3rd-order low-pass modulator operates at an oversampling ratio of 5 with a time-interleaving factor of 2 at sampling frequencies of 100MHz and 200MHz. It achieves an SNDR of 57dB and 49dB in signal bandwidths of 10MHz and 20MHz, respectively.