M. Azzaz, A. Benoist, E. Vianello, D. Garbin, E. Jalaguier, C. Cagli, C. Charpin, S. Bernasconi, S. Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, P. Candelier, C. Fenouillet-Béranger, L. Perniola
{"title":"通过16kb存储器切割表征Al2O3/HfO2双分子层对BEOL RRAM集成的好处","authors":"M. Azzaz, A. Benoist, E. Vianello, D. Garbin, E. Jalaguier, C. Cagli, C. Charpin, S. Bernasconi, S. Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, P. Candelier, C. Fenouillet-Béranger, L. Perniola","doi":"10.1109/ESSDERC.2015.7324765","DOIUrl":null,"url":null,"abstract":"In this paper, for the first time, the reliability of HfO<sub>2</sub>-based RRAM devices integrated in an advanced 28nm CMOS 16kbit demonstrator is presented. The effect of the introduction of a thin Al<sub>2</sub>O<sub>3</sub> layer in TiN/Ti/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/TiN is explored to improve the memory performances. Thanks to the in-depth electrical characterization of both HfO<sub>2</sub> and HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> stacks at device level and in the 16×1kbit demonstrator the interest of the bilayer is put forward (endurance: 1 decade after 1M cycles and retention: 6 hours at 200°C). Finally, thanks to our 3D model based on calculation of the Conductive Filament resistance using trap assisted tunneling (TAT) the role of Al<sub>2</sub>O<sub>3</sub> as tunneling layer is highlighted.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization\",\"authors\":\"M. Azzaz, A. Benoist, E. Vianello, D. Garbin, E. Jalaguier, C. Cagli, C. Charpin, S. Bernasconi, S. Jeannot, T. Dewolf, G. Audoit, C. Guedj, S. Denorme, P. Candelier, C. Fenouillet-Béranger, L. Perniola\",\"doi\":\"10.1109/ESSDERC.2015.7324765\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, for the first time, the reliability of HfO<sub>2</sub>-based RRAM devices integrated in an advanced 28nm CMOS 16kbit demonstrator is presented. The effect of the introduction of a thin Al<sub>2</sub>O<sub>3</sub> layer in TiN/Ti/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>/TiN is explored to improve the memory performances. Thanks to the in-depth electrical characterization of both HfO<sub>2</sub> and HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub> stacks at device level and in the 16×1kbit demonstrator the interest of the bilayer is put forward (endurance: 1 decade after 1M cycles and retention: 6 hours at 200°C). Finally, thanks to our 3D model based on calculation of the Conductive Filament resistance using trap assisted tunneling (TAT) the role of Al<sub>2</sub>O<sub>3</sub> as tunneling layer is highlighted.\",\"PeriodicalId\":332857,\"journal\":{\"name\":\"2015 45th European Solid State Device Research Conference (ESSDERC)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 45th European Solid State Device Research Conference (ESSDERC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.2015.7324765\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 45th European Solid State Device Research Conference (ESSDERC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2015.7324765","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization
In this paper, for the first time, the reliability of HfO2-based RRAM devices integrated in an advanced 28nm CMOS 16kbit demonstrator is presented. The effect of the introduction of a thin Al2O3 layer in TiN/Ti/HfO2/Al2O3/TiN is explored to improve the memory performances. Thanks to the in-depth electrical characterization of both HfO2 and HfO2/Al2O3 stacks at device level and in the 16×1kbit demonstrator the interest of the bilayer is put forward (endurance: 1 decade after 1M cycles and retention: 6 hours at 200°C). Finally, thanks to our 3D model based on calculation of the Conductive Filament resistance using trap assisted tunneling (TAT) the role of Al2O3 as tunneling layer is highlighted.