{"title":"基于铁电介质的Ga2O3[100]沟槽功率二极管","authors":"Yuan Li, Yitong Yang, Xiaoli Lu, Yunlong He, Xiao-hua Ma, Yue Hao","doi":"10.1109/ISPSD57135.2023.10147506","DOIUrl":null,"url":null,"abstract":"One major roadblock toward the maturation of Ga<inf>2</inf>O<inf>3</inf> technology is device overheating. For Ga<inf>2</inf>O<inf>3</inf> trench devices, although with the higher thermal conductivity (k<inf>T[010]</inf>) of [100] trench sidewall compared to [010] trench sidewall, the Ga<inf>2</inf>O<inf>3</inf> trench devices with [100] trench are rarely adopted, due to the worst sidewall interface quality induced by sidewall-orientation-dependent etch damage, even after the wet etch repair using acids. For the first time, the proposed electro-thermal co-designed Ga<inf>2</inf>O<inf>3</inf> [100] trench diode based on optimized trench sidewall interface quality, featuring ferroelectric dielectric, exhibits better performance compared with Ga<inf>2</inf>O<inf>3</inf> [010] trench diode. Under the identical power consumption, the Ga<inf>2</inf>O<inf>3</inf> [100] trench diode shows the lowest center junction temperature, which is 9 degree lower than that of Ga<inf>2</inf>O<inf>3</inf> [010] trench diode. The new interface-quality optimization strategy can significantly provide potential for electro-thermal optimization of Ga<inf>2</inf>O<inf>3</inf> trench devices.","PeriodicalId":344266,"journal":{"name":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Electro-Thermal Co-Designed Ga2O3[100] Trench Power Diode Featuring Ferroelectric Dielectric\",\"authors\":\"Yuan Li, Yitong Yang, Xiaoli Lu, Yunlong He, Xiao-hua Ma, Yue Hao\",\"doi\":\"10.1109/ISPSD57135.2023.10147506\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"One major roadblock toward the maturation of Ga<inf>2</inf>O<inf>3</inf> technology is device overheating. For Ga<inf>2</inf>O<inf>3</inf> trench devices, although with the higher thermal conductivity (k<inf>T[010]</inf>) of [100] trench sidewall compared to [010] trench sidewall, the Ga<inf>2</inf>O<inf>3</inf> trench devices with [100] trench are rarely adopted, due to the worst sidewall interface quality induced by sidewall-orientation-dependent etch damage, even after the wet etch repair using acids. For the first time, the proposed electro-thermal co-designed Ga<inf>2</inf>O<inf>3</inf> [100] trench diode based on optimized trench sidewall interface quality, featuring ferroelectric dielectric, exhibits better performance compared with Ga<inf>2</inf>O<inf>3</inf> [010] trench diode. Under the identical power consumption, the Ga<inf>2</inf>O<inf>3</inf> [100] trench diode shows the lowest center junction temperature, which is 9 degree lower than that of Ga<inf>2</inf>O<inf>3</inf> [010] trench diode. The new interface-quality optimization strategy can significantly provide potential for electro-thermal optimization of Ga<inf>2</inf>O<inf>3</inf> trench devices.\",\"PeriodicalId\":344266,\"journal\":{\"name\":\"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD57135.2023.10147506\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD57135.2023.10147506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Electro-Thermal Co-Designed Ga2O3[100] Trench Power Diode Featuring Ferroelectric Dielectric
One major roadblock toward the maturation of Ga2O3 technology is device overheating. For Ga2O3 trench devices, although with the higher thermal conductivity (kT[010]) of [100] trench sidewall compared to [010] trench sidewall, the Ga2O3 trench devices with [100] trench are rarely adopted, due to the worst sidewall interface quality induced by sidewall-orientation-dependent etch damage, even after the wet etch repair using acids. For the first time, the proposed electro-thermal co-designed Ga2O3 [100] trench diode based on optimized trench sidewall interface quality, featuring ferroelectric dielectric, exhibits better performance compared with Ga2O3 [010] trench diode. Under the identical power consumption, the Ga2O3 [100] trench diode shows the lowest center junction temperature, which is 9 degree lower than that of Ga2O3 [010] trench diode. The new interface-quality optimization strategy can significantly provide potential for electro-thermal optimization of Ga2O3 trench devices.