基于fpga的多相DC-DC变换器数字脉宽调制技术的比较分析

M. Tahir, Geoffrey R Walker, M. Broadmeadow, S. M. Bulmer, G. Ledwich
{"title":"基于fpga的多相DC-DC变换器数字脉宽调制技术的比较分析","authors":"M. Tahir, Geoffrey R Walker, M. Broadmeadow, S. M. Bulmer, G. Ledwich","doi":"10.1109/SPEC.2016.7846119","DOIUrl":null,"url":null,"abstract":"This paper proposes the development of a new digital pulse width modulation (PWM) scheme for aplication to both single phase and multiphase voltage regulation modules (VRMs), which are used as processor power supplies. A comparative analysis of this novel phase accumulator based PWM generation technique is presented with the traditionally used counter based PWM approach for synchronous buck converter topologies. A simulation study of open loop systems of these digital techniques is carried out to demonstrate their feasibility and performance characteristics. For practical evaluation of these two techniques, experiments in single-phase and eight-phase 12 V to 1V buck converter controlled by an FPGA are performed by using the 16 bit phase accumulator and counter. The impact from the interleaving strategy is presented and peak-to-peak voltage ripple and output spectra are evaluated.","PeriodicalId":403316,"journal":{"name":"2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Comparative analysis of FPGA-based digital pulse width modulation techniques for multiphase DC-DC converters\",\"authors\":\"M. Tahir, Geoffrey R Walker, M. Broadmeadow, S. M. Bulmer, G. Ledwich\",\"doi\":\"10.1109/SPEC.2016.7846119\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes the development of a new digital pulse width modulation (PWM) scheme for aplication to both single phase and multiphase voltage regulation modules (VRMs), which are used as processor power supplies. A comparative analysis of this novel phase accumulator based PWM generation technique is presented with the traditionally used counter based PWM approach for synchronous buck converter topologies. A simulation study of open loop systems of these digital techniques is carried out to demonstrate their feasibility and performance characteristics. For practical evaluation of these two techniques, experiments in single-phase and eight-phase 12 V to 1V buck converter controlled by an FPGA are performed by using the 16 bit phase accumulator and counter. The impact from the interleaving strategy is presented and peak-to-peak voltage ripple and output spectra are evaluated.\",\"PeriodicalId\":403316,\"journal\":{\"name\":\"2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPEC.2016.7846119\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPEC.2016.7846119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文提出了一种新的数字脉宽调制(PWM)方案,适用于作为处理器电源的单相和多相电压调节模块(VRMs)。将这种基于相位累加器的新型PWM产生技术与传统的基于计数器的同步降压变换器拓扑PWM产生方法进行了比较分析。对这些数字技术的开环系统进行了仿真研究,以验证其可行性和性能特点。为了对这两种技术进行实际评估,利用16位相位累加器和计数器在FPGA控制的单相和八相12v - 1V降压变换器上进行了实验。分析了交错策略对系统的影响,并对电压峰间纹波和输出频谱进行了评估。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Comparative analysis of FPGA-based digital pulse width modulation techniques for multiphase DC-DC converters
This paper proposes the development of a new digital pulse width modulation (PWM) scheme for aplication to both single phase and multiphase voltage regulation modules (VRMs), which are used as processor power supplies. A comparative analysis of this novel phase accumulator based PWM generation technique is presented with the traditionally used counter based PWM approach for synchronous buck converter topologies. A simulation study of open loop systems of these digital techniques is carried out to demonstrate their feasibility and performance characteristics. For practical evaluation of these two techniques, experiments in single-phase and eight-phase 12 V to 1V buck converter controlled by an FPGA are performed by using the 16 bit phase accumulator and counter. The impact from the interleaving strategy is presented and peak-to-peak voltage ripple and output spectra are evaluated.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信