一个1 V, 26 /spl mu/W的扩展温度范围的带隙参考在130纳米CMOS技术

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI:10.1109/ESSCIR.2005.1541670

A. Cabrini, G. Sandre, L. Gobbi, P. Malcovati, M. Pasotti, M. Poles, F. Rigoni, G. Torelli

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引用次数: 11

摘要

本文提出了一个全CMOS带隙基准，适用于扩展温度范围(从-50 /spl°C到160 /spl°C)。该方案的输出电压为798 mV，电源低至1 V。测量的输出电压变化作为温度(-50 /spl°C至160 /spl°C)和电源(1 V至2 V)的函数分别为6.64 ppm//spl°C和248 ppm/V。高精度是通过最小化运算放大器偏移来实现的。功耗约为26 /spl mu/W(电源电压= 1v)，硅面积为0.02 mm/sup 2/。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 1 V, 26 /spl mu/W extended temperature range band-gap reference in 130-nm CMOS technology

This paper presents a fully CMOS band-gap reference for extended temperature range (from -50 /spl deg/C to 160 /spl deg/C) applications. The proposed solution provides an output voltage of 798 mV with a power supply as low as 1 V. The measured output voltage variations as a function of temperature (-50 /spl deg/C to 160 /spl deg/C) and power supply (1 V to 2 V) are 6.64 ppm//spl deg/C and 248 ppm/V, respectively. High accuracy is achieved by minimizing the operational amplifier offset. Power consumption is approximately equal to 26 /spl mu/W (supply voltage = 1 V). Silicon area is 0.02 mm/sup 2/.

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Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.

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