Controlled domain wall directions within nanodevices integrated on the surface of LiNbO3 single crystals

Binary data in 1T1C and 2T2C non-volatile ferroelectric random access memories are represented by the switching and non-switching polarization charges based on a perovskite ferroelectric capacitor. However, downscaling of the cell dimensions reduces the amount of measurable polarization charges, thus the charge difference is no longer detected reliably in high-density memories. Erasable conductive nanosized domain walls (CDWs) in ferroelectrics can relieve the bottleneck of traditional ferroelectric memories. The binary ON-OFF states of the device accompany the creation and erasure of conductive walls between two antiparallel and parallel domains. Although many efforts have been contributed to the studies of the precise physical mechanism of domain wall conductivity and the fabrication process, there remain several challenges before its commercialization, among which how to increase the DW current density and to reduce the coercive voltage is critical. Here we show the route to arbitrarily control the conductive DW paths within the LiNbO3 nanodevices and the method to align the nanodevice against the polarization direction for the achievements of the best polarization retention and the minimum coercive field. In addition, a method to magnify the domain wall current by 3 times through the polarization alignment within the nanodevice has been demonstrated.