Mu-Chun Wang, Hsin-Chia Yang, W. Liao, Hsiu-Yen Yang, Yao-Yuan Hoe, K. Lin, Shuang-Yuan Chen
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CESL deposition promoting n/p MOSFETs under 45-nm-node process fabrication
In this study, the process technology of contact-etching stop-layer (CESL) with LPCVD or PECVD is performed by interlayer-dielectric-SiNx stressing layer to form the tensile or compressive strained n/p MOSFETs. Because the strain effect on MOSFET devices is finite, the promoting performance of source/drain current is increased more while the channel lengths of the devices are decreased more. This phenomenon is obviously observed with devices, width/length=W/L= 10/10 and 10/.08 (µm/µm). Moreover, the trend evidence for tensile strain benefited to nMOSFETs and pMOSFETs, but for compressive strain favoring pMOSFTEs and not hugely degrading nMOSFETs, is also achieved.