CESL沉积促进45纳米节点工艺制造n/p mosfet

Mu-Chun Wang, Hsin-Chia Yang, W. Liao, Hsiu-Yen Yang, Yao-Yuan Hoe, K. Lin, Shuang-Yuan Chen
{"title":"CESL沉积促进45纳米节点工艺制造n/p mosfet","authors":"Mu-Chun Wang, Hsin-Chia Yang, W. Liao, Hsiu-Yen Yang, Yao-Yuan Hoe, K. Lin, Shuang-Yuan Chen","doi":"10.1109/ISNE.2010.5669140","DOIUrl":null,"url":null,"abstract":"In this study, the process technology of contact-etching stop-layer (CESL) with LPCVD or PECVD is performed by interlayer-dielectric-SiNx stressing layer to form the tensile or compressive strained n/p MOSFETs. Because the strain effect on MOSFET devices is finite, the promoting performance of source/drain current is increased more while the channel lengths of the devices are decreased more. This phenomenon is obviously observed with devices, width/length=W/L= 10/10 and 10/.08 (µm/µm). Moreover, the trend evidence for tensile strain benefited to nMOSFETs and pMOSFETs, but for compressive strain favoring pMOSFTEs and not hugely degrading nMOSFETs, is also achieved.","PeriodicalId":412093,"journal":{"name":"2010 International Symposium on Next Generation Electronics","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"CESL deposition promoting n/p MOSFETs under 45-nm-node process fabrication\",\"authors\":\"Mu-Chun Wang, Hsin-Chia Yang, W. Liao, Hsiu-Yen Yang, Yao-Yuan Hoe, K. Lin, Shuang-Yuan Chen\",\"doi\":\"10.1109/ISNE.2010.5669140\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, the process technology of contact-etching stop-layer (CESL) with LPCVD or PECVD is performed by interlayer-dielectric-SiNx stressing layer to form the tensile or compressive strained n/p MOSFETs. Because the strain effect on MOSFET devices is finite, the promoting performance of source/drain current is increased more while the channel lengths of the devices are decreased more. This phenomenon is obviously observed with devices, width/length=W/L= 10/10 and 10/.08 (µm/µm). Moreover, the trend evidence for tensile strain benefited to nMOSFETs and pMOSFETs, but for compressive strain favoring pMOSFTEs and not hugely degrading nMOSFETs, is also achieved.\",\"PeriodicalId\":412093,\"journal\":{\"name\":\"2010 International Symposium on Next Generation Electronics\",\"volume\":\"47 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International Symposium on Next Generation Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISNE.2010.5669140\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International Symposium on Next Generation Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2010.5669140","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

在本研究中,采用LPCVD或PECVD的接触刻蚀停止层(CESL)工艺,通过层间-介电- sinx应力层形成拉伸或压缩应变n/p的mosfet。由于应变对MOSFET器件的影响是有限的,因此源漏电流的促进性能越高,器件的沟道长度越短。当宽度/长度=W/L= 10/10和10/ 0.08时,可以明显观察到这种现象(µm /µm)。此外,还获得了拉伸应变有利于nmosfet和pmosfet的趋势证据,但压缩应变有利于pmosfte而不会大大降低nmosfet。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CESL deposition promoting n/p MOSFETs under 45-nm-node process fabrication
In this study, the process technology of contact-etching stop-layer (CESL) with LPCVD or PECVD is performed by interlayer-dielectric-SiNx stressing layer to form the tensile or compressive strained n/p MOSFETs. Because the strain effect on MOSFET devices is finite, the promoting performance of source/drain current is increased more while the channel lengths of the devices are decreased more. This phenomenon is obviously observed with devices, width/length=W/L= 10/10 and 10/.08 (µm/µm). Moreover, the trend evidence for tensile strain benefited to nMOSFETs and pMOSFETs, but for compressive strain favoring pMOSFTEs and not hugely degrading nMOSFETs, is also achieved.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信