{"title":"基于0.18um CMOS工艺的WCDMA应用LNA设计","authors":"Xiao-Dong Wang, Jia-you Song","doi":"10.1109/ICMMT.2007.381467","DOIUrl":null,"url":null,"abstract":"This paper presents a design and optimization method for low noise amplifiers (LNAs), based on the minimization of the noise figure for a given power consumption. The LNA design is realized through the 0.18 mum CMOS process with the operating frequency at 2.14GHz. Simulation results show that the amplifier draws 5.36 mA from a given 1.8 V supply voltage while keeping the input/output impedance matched to 50 Omega. Furthermore, the circuit behaviors with 0.655 dB noise figure, gain of 16.64 dB, 1 dB compression point of about -12 dBm and IIP3 of 6 dBm.","PeriodicalId":409971,"journal":{"name":"2007 International Conference on Microwave and Millimeter Wave Technology","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2007-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A LNA Design for WCDMA Application In 0.18um CMOS Process\",\"authors\":\"Xiao-Dong Wang, Jia-you Song\",\"doi\":\"10.1109/ICMMT.2007.381467\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a design and optimization method for low noise amplifiers (LNAs), based on the minimization of the noise figure for a given power consumption. The LNA design is realized through the 0.18 mum CMOS process with the operating frequency at 2.14GHz. Simulation results show that the amplifier draws 5.36 mA from a given 1.8 V supply voltage while keeping the input/output impedance matched to 50 Omega. Furthermore, the circuit behaviors with 0.655 dB noise figure, gain of 16.64 dB, 1 dB compression point of about -12 dBm and IIP3 of 6 dBm.\",\"PeriodicalId\":409971,\"journal\":{\"name\":\"2007 International Conference on Microwave and Millimeter Wave Technology\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Conference on Microwave and Millimeter Wave Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMMT.2007.381467\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Conference on Microwave and Millimeter Wave Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMMT.2007.381467","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A LNA Design for WCDMA Application In 0.18um CMOS Process
This paper presents a design and optimization method for low noise amplifiers (LNAs), based on the minimization of the noise figure for a given power consumption. The LNA design is realized through the 0.18 mum CMOS process with the operating frequency at 2.14GHz. Simulation results show that the amplifier draws 5.36 mA from a given 1.8 V supply voltage while keeping the input/output impedance matched to 50 Omega. Furthermore, the circuit behaviors with 0.655 dB noise figure, gain of 16.64 dB, 1 dB compression point of about -12 dBm and IIP3 of 6 dBm.
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