{"title":"图1:高效的模块生成","authors":"H. Janssen, M. Treffers, R. Segers, J. Huisken","doi":"10.1109/ESSCIRC.1989.5468187","DOIUrl":null,"url":null,"abstract":"GrapMG is a module generator environment in which an IC-designer is able to make parametrized layout modules in a flexible way. With grapMG some very complex modules have been designed for use in a silicon compiler for digital signal processing chips. Successful application of module generation in this compiler is made possible because a new design strategy simplifies the adaptation of modules to other technologies. The investment in the development of new modules is small compared to traditional procedural methods. In this paper the design strategy is presented together with the facilities that are available in the module design environment.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"GrapMG: Cost-effective module generation\",\"authors\":\"H. Janssen, M. Treffers, R. Segers, J. Huisken\",\"doi\":\"10.1109/ESSCIRC.1989.5468187\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"GrapMG is a module generator environment in which an IC-designer is able to make parametrized layout modules in a flexible way. With grapMG some very complex modules have been designed for use in a silicon compiler for digital signal processing chips. Successful application of module generation in this compiler is made possible because a new design strategy simplifies the adaptation of modules to other technologies. The investment in the development of new modules is small compared to traditional procedural methods. In this paper the design strategy is presented together with the facilities that are available in the module design environment.\",\"PeriodicalId\":187183,\"journal\":{\"name\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1989.5468187\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1989.5468187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
GrapMG is a module generator environment in which an IC-designer is able to make parametrized layout modules in a flexible way. With grapMG some very complex modules have been designed for use in a silicon compiler for digital signal processing chips. Successful application of module generation in this compiler is made possible because a new design strategy simplifies the adaptation of modules to other technologies. The investment in the development of new modules is small compared to traditional procedural methods. In this paper the design strategy is presented together with the facilities that are available in the module design environment.