{"title":"声音传播蜂窝式处理器的结构、比较和性能","authors":"R. Dogaru, I. Dogaru, N. Zamfir, D. Aiordachioaie","doi":"10.1109/CNNA.2012.6331461","DOIUrl":null,"url":null,"abstract":"The aim of this paper is to discuss and compare several architectural possibilities for implementing a simulator for (ultra) sound propagation in a controlled environment (e.g. using specified obstacles and signal sources). Although initially such sound propagation simulators were designed to assist the design of robotic \"ears\" of autonomous agents trying to reconstruct an image of the environment, its use expands beyond its initial goals. We are particularly interested here to define the limits and the constraints for kilo-processor architectures capable to implement such systems at reasonable costs. Our results for various implementations (software, FPGA, GPU/with CUDA) are considered with some proposals for suitable kilo-processor architectures.","PeriodicalId":387536,"journal":{"name":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","volume":"224 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Sound propagation cellular processors architectures, comparisons and performances\",\"authors\":\"R. Dogaru, I. Dogaru, N. Zamfir, D. Aiordachioaie\",\"doi\":\"10.1109/CNNA.2012.6331461\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The aim of this paper is to discuss and compare several architectural possibilities for implementing a simulator for (ultra) sound propagation in a controlled environment (e.g. using specified obstacles and signal sources). Although initially such sound propagation simulators were designed to assist the design of robotic \\\"ears\\\" of autonomous agents trying to reconstruct an image of the environment, its use expands beyond its initial goals. We are particularly interested here to define the limits and the constraints for kilo-processor architectures capable to implement such systems at reasonable costs. Our results for various implementations (software, FPGA, GPU/with CUDA) are considered with some proposals for suitable kilo-processor architectures.\",\"PeriodicalId\":387536,\"journal\":{\"name\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"volume\":\"224 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.2012.6331461\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 13th International Workshop on Cellular Nanoscale Networks and their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2012.6331461","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Sound propagation cellular processors architectures, comparisons and performances
The aim of this paper is to discuss and compare several architectural possibilities for implementing a simulator for (ultra) sound propagation in a controlled environment (e.g. using specified obstacles and signal sources). Although initially such sound propagation simulators were designed to assist the design of robotic "ears" of autonomous agents trying to reconstruct an image of the environment, its use expands beyond its initial goals. We are particularly interested here to define the limits and the constraints for kilo-processor architectures capable to implement such systems at reasonable costs. Our results for various implementations (software, FPGA, GPU/with CUDA) are considered with some proposals for suitable kilo-processor architectures.