{"title":"一个125 MHz-86 dB的IM3可编程增益放大器","authors":"Cheng-Chung Hsu, Jieh-Tsorng Wu","doi":"10.1109/VLSIC.2002.1015035","DOIUrl":null,"url":null,"abstract":"A digitally programmable-gain amplifier (PGA) is realized using a 0.35 /spl mu/m CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.","PeriodicalId":162493,"journal":{"name":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A 125 MHz-86 dB IM3 programmable-gain amplifier\",\"authors\":\"Cheng-Chung Hsu, Jieh-Tsorng Wu\",\"doi\":\"10.1109/VLSIC.2002.1015035\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A digitally programmable-gain amplifier (PGA) is realized using a 0.35 /spl mu/m CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.\",\"PeriodicalId\":162493,\"journal\":{\"name\":\"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2002.1015035\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2002.1015035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A digitally programmable-gain amplifier (PGA) is realized using a 0.35 /spl mu/m CMOS technology. Constant bandwidth and high linearity are achieved by using a current-mode amplifier with resistor-network feedback. The PGA has a voltage gain varying from 0 dB to 19 dB with a bandwidth of 125 MHz. With 1 Vpp output, the third-order intermodulation (IM3) of the PGA is -86 dB at 10 MHz and -59 dB at 80 MHz. The distortion is also insensitive to the gain change. The circuit dissipates 21 mW from a 3.3 V supply.