G. Thakar, S. Madan, C. Garza, W.L. Krisa, P. Nicollian, J.L. Wise, C. Lee, J. McKee, A. Appel, A. Esquivel, V.M. McNeil, D. Prinslow, B. Riemenschneider, T. Utsumi, R. Eklund, R. Chapman
{"title":"采用i线光刻和BARC的高性能0.3 /spl mu/m CMOS","authors":"G. Thakar, S. Madan, C. Garza, W.L. Krisa, P. Nicollian, J.L. Wise, C. Lee, J. McKee, A. Appel, A. Esquivel, V.M. McNeil, D. Prinslow, B. Riemenschneider, T. Utsumi, R. Eklund, R. Chapman","doi":"10.1109/VLSIT.1995.520865","DOIUrl":null,"url":null,"abstract":"TiN or organic Bottom AntiReflection Coatings (BARC), polysilicon hammerheads, phase shift masks, quadrupole off-axis illumination I-line lithography at N.A.=0.60, shallow source/drain extenders, LOCOS isolation, and 6 nm gate oxide are used to obtain high performance 0.30 /spl mu/m 2.5 V CMOS with effective channel lengths <0.20 /spl mu/m. The use of BARC reduces off current and improves PMOS hot carrier reliability.","PeriodicalId":328379,"journal":{"name":"1995 Symposium on VLSI Technology. Digest of Technical Papers","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"High performance 0.3 /spl mu/m CMOS using I-line lithography and BARC\",\"authors\":\"G. Thakar, S. Madan, C. Garza, W.L. Krisa, P. Nicollian, J.L. Wise, C. Lee, J. McKee, A. Appel, A. Esquivel, V.M. McNeil, D. Prinslow, B. Riemenschneider, T. Utsumi, R. Eklund, R. Chapman\",\"doi\":\"10.1109/VLSIT.1995.520865\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"TiN or organic Bottom AntiReflection Coatings (BARC), polysilicon hammerheads, phase shift masks, quadrupole off-axis illumination I-line lithography at N.A.=0.60, shallow source/drain extenders, LOCOS isolation, and 6 nm gate oxide are used to obtain high performance 0.30 /spl mu/m 2.5 V CMOS with effective channel lengths <0.20 /spl mu/m. The use of BARC reduces off current and improves PMOS hot carrier reliability.\",\"PeriodicalId\":328379,\"journal\":{\"name\":\"1995 Symposium on VLSI Technology. Digest of Technical Papers\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1995 Symposium on VLSI Technology. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1995.520865\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 Symposium on VLSI Technology. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1995.520865","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
采用TiN或有机底部抗反射涂层(BARC)、多晶硅锤头、相移掩模、四极离轴照明i线光刻(N.A.=0.60)、浅源/漏极扩展器、LOCOS隔离和6 nm栅氧化物，获得了有效通道长度<0.20 /spl mu/m的高性能0.30 /spl mu/m 2.5 V CMOS。BARC的使用减少了关闭电流，提高了PMOS热载流子的可靠性。
High performance 0.3 /spl mu/m CMOS using I-line lithography and BARC
TiN or organic Bottom AntiReflection Coatings (BARC), polysilicon hammerheads, phase shift masks, quadrupole off-axis illumination I-line lithography at N.A.=0.60, shallow source/drain extenders, LOCOS isolation, and 6 nm gate oxide are used to obtain high performance 0.30 /spl mu/m 2.5 V CMOS with effective channel lengths <0.20 /spl mu/m. The use of BARC reduces off current and improves PMOS hot carrier reliability.
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