{"title":"用于高精度计算的交错有理数/基数算术系统","authors":"K. Hwang, T. Chang","doi":"10.1109/ARITH.1978.6155781","DOIUrl":null,"url":null,"abstract":"A new interleaved rational/radix number system is proposed for upgrading the precision of normalized Floating-Point (FLP) arithmetic operations without increasing the basic word length. A complete set of rational rounding and arithmetic algorithms are developed. The Average Relative Representation Error (ARRE) of the proposed flexible FLP system is computed through a series of simulation studies on CDC 6500. Our results show a 10% improvement of representation accuracy when compared with the ARRE of conventional FLP system. The architecture of a rational FLP arithmetic processor is also presented. Tradeoffs between operating speed and computing accuracy are discussed.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An interleaved rational/radix arithmetic system for high-precision computations\",\"authors\":\"K. Hwang, T. Chang\",\"doi\":\"10.1109/ARITH.1978.6155781\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new interleaved rational/radix number system is proposed for upgrading the precision of normalized Floating-Point (FLP) arithmetic operations without increasing the basic word length. A complete set of rational rounding and arithmetic algorithms are developed. The Average Relative Representation Error (ARRE) of the proposed flexible FLP system is computed through a series of simulation studies on CDC 6500. Our results show a 10% improvement of representation accuracy when compared with the ARRE of conventional FLP system. The architecture of a rational FLP arithmetic processor is also presented. Tradeoffs between operating speed and computing accuracy are discussed.\",\"PeriodicalId\":443215,\"journal\":{\"name\":\"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1978-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ARITH.1978.6155781\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARITH.1978.6155781","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An interleaved rational/radix arithmetic system for high-precision computations
A new interleaved rational/radix number system is proposed for upgrading the precision of normalized Floating-Point (FLP) arithmetic operations without increasing the basic word length. A complete set of rational rounding and arithmetic algorithms are developed. The Average Relative Representation Error (ARRE) of the proposed flexible FLP system is computed through a series of simulation studies on CDC 6500. Our results show a 10% improvement of representation accuracy when compared with the ARRE of conventional FLP system. The architecture of a rational FLP arithmetic processor is also presented. Tradeoffs between operating speed and computing accuracy are discussed.