利用QuickChip设计高频模拟电路

[1991] Proceedings. First Great Lakes Symposium on VLSI Pub Date : 1991-03-01 DOI:10.1109/GLSV.1991.143965

S. Burns

{"title":"利用QuickChip设计高频模拟电路","authors":"S. Burns","doi":"10.1109/GLSV.1991.143965","DOIUrl":null,"url":null,"abstract":"The author describes analog circuit design methodologies and techniques required to optimize high frequency performance when operating near the upper frequency limit of BJT-based analog ASICs. The Tektronix QuickChip 2S ASIC array is used as the analysis and test vehicle. These techniques are illustrated using a series of examples including an actively shunt-peaked wideband amplifier and a multi-chip FM receiver as well as an analysis of the need to optimize the RC product in the manual routing of both metallizations in critical areas of the circuit.<<ETX>>","PeriodicalId":261873,"journal":{"name":"[1991] Proceedings. First Great Lakes Symposium on VLSI","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High frequency analog circuit design using QuickChip\",\"authors\":\"S. Burns\",\"doi\":\"10.1109/GLSV.1991.143965\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author describes analog circuit design methodologies and techniques required to optimize high frequency performance when operating near the upper frequency limit of BJT-based analog ASICs. The Tektronix QuickChip 2S ASIC array is used as the analysis and test vehicle. These techniques are illustrated using a series of examples including an actively shunt-peaked wideband amplifier and a multi-chip FM receiver as well as an analysis of the need to optimize the RC product in the manual routing of both metallizations in critical areas of the circuit.<<ETX>>\",\"PeriodicalId\":261873,\"journal\":{\"name\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1991.143965\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. First Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1991.143965","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

作者描述了模拟电路的设计方法和技术，以优化高频性能，当工作在接近频率上限时，基于bjt的模拟asic。采用泰克QuickChip 2S ASIC阵列作为分析测试载体。这些技术是通过一系列的例子来说明的，包括主动并联峰值宽带放大器和多芯片调频接收器，以及在电路关键区域的金属化手工路由中优化RC产品的需求分析。

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High frequency analog circuit design using QuickChip

The author describes analog circuit design methodologies and techniques required to optimize high frequency performance when operating near the upper frequency limit of BJT-based analog ASICs. The Tektronix QuickChip 2S ASIC array is used as the analysis and test vehicle. These techniques are illustrated using a series of examples including an actively shunt-peaked wideband amplifier and a multi-chip FM receiver as well as an analysis of the need to optimize the RC product in the manual routing of both metallizations in critical areas of the circuit.<>

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[1991] Proceedings. First Great Lakes Symposium on VLSI

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