S. Voinigescu, P. Popescu, P. Banens, M. Copeland, G. Fortier, K. Howlett, M. Herod, D. Marchesan, Jonathan L. Showell, S. Sziiagyi, H. Tran, J. Weng
{"title":"10gb /s ~ 40gb /s高集成光网络ic电路与技术","authors":"S. Voinigescu, P. Popescu, P. Banens, M. Copeland, G. Fortier, K. Howlett, M. Herod, D. Marchesan, Jonathan L. Showell, S. Sziiagyi, H. Tran, J. Weng","doi":"10.1109/CICC.2001.929795","DOIUrl":null,"url":null,"abstract":"This paper presents a comparative overview of the performance of Si CMOS, SiGe BiCMOS and III-V HBT and FET technologies for 10-40 Gb/s fiber-optic applications. Active and passive device performance requirements, as well as on-chip isolation issues are first addressed. Fundamental building blocks are overviewed and the pros and cons of each technology implementation are discussed. Finally, a sub 2.5 W, highly integrated 10 Gb/s SiGe BiCMOS implementation of a 10 Gb/s to 622 Mb/s transceiver is described in detail. The transceiver achieves the highest level of integration, providing EOI (electro-optical-interface) and SerDes (Serializer-Deserializer) functions.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":"{\"title\":\"Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s\",\"authors\":\"S. Voinigescu, P. Popescu, P. Banens, M. Copeland, G. Fortier, K. Howlett, M. Herod, D. Marchesan, Jonathan L. Showell, S. Sziiagyi, H. Tran, J. Weng\",\"doi\":\"10.1109/CICC.2001.929795\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a comparative overview of the performance of Si CMOS, SiGe BiCMOS and III-V HBT and FET technologies for 10-40 Gb/s fiber-optic applications. Active and passive device performance requirements, as well as on-chip isolation issues are first addressed. Fundamental building blocks are overviewed and the pros and cons of each technology implementation are discussed. Finally, a sub 2.5 W, highly integrated 10 Gb/s SiGe BiCMOS implementation of a 10 Gb/s to 622 Mb/s transceiver is described in detail. The transceiver achieves the highest level of integration, providing EOI (electro-optical-interface) and SerDes (Serializer-Deserializer) functions.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"28\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929795\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929795","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Circuits and technologies for highly integrated optical networking ICs at 10 Gb/s to 40 Gb/s
This paper presents a comparative overview of the performance of Si CMOS, SiGe BiCMOS and III-V HBT and FET technologies for 10-40 Gb/s fiber-optic applications. Active and passive device performance requirements, as well as on-chip isolation issues are first addressed. Fundamental building blocks are overviewed and the pros and cons of each technology implementation are discussed. Finally, a sub 2.5 W, highly integrated 10 Gb/s SiGe BiCMOS implementation of a 10 Gb/s to 622 Mb/s transceiver is described in detail. The transceiver achieves the highest level of integration, providing EOI (electro-optical-interface) and SerDes (Serializer-Deserializer) functions.