在计算机架构测试芯片中使用新颖的基于python的硬件建模框架的经验

2016 IEEE Hot Chips 28 Symposium (HCS) Pub Date : 2016-08-01 DOI:10.1109/HOTCHIPS.2016.7936233

Christopher Torng, Moyang Wang, Bharath Sudheendra, Nagaraj Murali, Suren Jayasuriya, S. Srinath, T. Pritchard, Robin Ying, C. Batten

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摘要

这张海贴画将描述一个使用我们新的基于python的硬件建模框架设计的IBM 130纳米的胶带2×2mm 1.3 m晶体管测试芯片。我们的目标是演示这个框架支持敏捷硬件设计流程的能力。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Experiences using a novel Python-based hardware modeling framework for computer architecture test chips

This poster will describe a taped-out 2×2mm 1.3 M-transistor test chip in IBM 130 nm designed using our new Python-based hardware modeling framework. The goal of our tapeout was to demonstrate the ability of this framework to enable Agile hardware design flows.

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2016 IEEE Hot Chips 28 Symposium (HCS)

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