SRAM α诱发软错误率随技术节点的变化

Damien Leroy, R. Gaillard, E. Schäfer, Cyrille Beltrando, S. Wen, R. Wong
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引用次数: 10

摘要

本文介绍了iRoC Technologies在180 nm至65 nm的技术节点上对α粒子在SRAM存储器上诱导的SER进行测试的结果汇编。本研究的目的是建立SEU和MCU的灵敏度随技术节点的变化,并分析在给定的技术节点上不同的设计和工艺参数可能产生的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Variation of SRAM Alpha-Induced Soft Error Rate with Technology Node
This document presents a compilation of results from tests performed by iRoC Technologies on SER induced by alpha particles on SRAM memories for technology nodes from 180 nm to 65 nm. The aim of this study is to establish the variation of sensitivity with technology node for SEU and MCU, and to analyze the possible influence of different designs and technological parameters at a given technology node.
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