基于集成SOI延迟线的全光缓冲器和时隙交换器的实现

G. Mourgias-Alexandris, M. Moralis‐Pegios, N. Terzenidis, N. Pleros, K. Vyrsokinos
{"title":"基于集成SOI延迟线的全光缓冲器和时隙交换器的实现","authors":"G. Mourgias-Alexandris, M. Moralis‐Pegios, N. Terzenidis, N. Pleros, K. Vyrsokinos","doi":"10.1109/PACET.2017.8259961","DOIUrl":null,"url":null,"abstract":"The expected transition towards all-optical packet flow routers, that conform to the strict latency and bandwidth requirements of DataCenter applications, is closely related to the realization of integrated optical delay line buffers, as well as Time Slot Interchangers to provide the necessary contention resolution functions. However, existing delay line implementations, provide limited buffering time, or require large footprint, due to the technology platform. We present integrated Silicon-on-Insulator spiral waveguides as all-optical delay line buffer and time-slot-interchanger. The three different delay lines induce delays of 6.5nsec, 11.3nsec and 17.2nsec, respectively. Two differentially-biased SOA-MZI wavelength converters and integrated delay lines used for optical buffering from 6.5nsec up to 17.2nsec and successful time-slot rearrangement of three data packets, both achieving error-free operation at 10Gb/s.","PeriodicalId":171095,"journal":{"name":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Implementation of an all-optical buffer & TimeSlot-interchanger based on integrated SOI delay lines\",\"authors\":\"G. Mourgias-Alexandris, M. Moralis‐Pegios, N. Terzenidis, N. Pleros, K. Vyrsokinos\",\"doi\":\"10.1109/PACET.2017.8259961\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The expected transition towards all-optical packet flow routers, that conform to the strict latency and bandwidth requirements of DataCenter applications, is closely related to the realization of integrated optical delay line buffers, as well as Time Slot Interchangers to provide the necessary contention resolution functions. However, existing delay line implementations, provide limited buffering time, or require large footprint, due to the technology platform. We present integrated Silicon-on-Insulator spiral waveguides as all-optical delay line buffer and time-slot-interchanger. The three different delay lines induce delays of 6.5nsec, 11.3nsec and 17.2nsec, respectively. Two differentially-biased SOA-MZI wavelength converters and integrated delay lines used for optical buffering from 6.5nsec up to 17.2nsec and successful time-slot rearrangement of three data packets, both achieving error-free operation at 10Gb/s.\",\"PeriodicalId\":171095,\"journal\":{\"name\":\"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PACET.2017.8259961\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Panhellenic Conference on Electronics and Telecommunications (PACET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACET.2017.8259961","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

向符合数据中心应用严格的延迟和带宽要求的全光分组流路由器的预期过渡,与集成光延迟线缓冲器的实现以及提供必要的争用解决功能的时隙交换器密切相关。然而,由于技术平台的原因,现有的延迟线实现提供有限的缓冲时间,或者需要很大的占用空间。我们提出了集成的绝缘体上硅螺旋波导作为全光延迟线缓冲器和时隙交换器。三种不同延迟线的延时分别为6.5nsec、11.3nsec和17.2nsec。采用两个差分SOA-MZI波长转换器和集成延迟线,实现6.5nsec至17.2nsec的光缓冲,并成功地对三个数据包进行时隙重排,实现了10Gb/s的无差错操作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Implementation of an all-optical buffer & TimeSlot-interchanger based on integrated SOI delay lines
The expected transition towards all-optical packet flow routers, that conform to the strict latency and bandwidth requirements of DataCenter applications, is closely related to the realization of integrated optical delay line buffers, as well as Time Slot Interchangers to provide the necessary contention resolution functions. However, existing delay line implementations, provide limited buffering time, or require large footprint, due to the technology platform. We present integrated Silicon-on-Insulator spiral waveguides as all-optical delay line buffer and time-slot-interchanger. The three different delay lines induce delays of 6.5nsec, 11.3nsec and 17.2nsec, respectively. Two differentially-biased SOA-MZI wavelength converters and integrated delay lines used for optical buffering from 6.5nsec up to 17.2nsec and successful time-slot rearrangement of three data packets, both achieving error-free operation at 10Gb/s.
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