用于图形计算的30MHz编译芯片组

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157199

S. Noujaim, R. Hartley, H. Cline, R. Jerdonek, S. Ludke

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引用次数: 9

摘要

我们将介绍一种采用硅编译器设计的1.25μm CMOS芯片，其器件密度达到1500个晶体管/mm2。芯片的位片元件串行通信，以实现在30MHz时钟速率下吞吐量为5000万乘法/累加/秒的管道。

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30MHz compiled chip set for graphics computations

A 1.25μm CMOS chip that has attained a device density of 1500 transistors/mm2, using a silicon compiler for design, will be described. The bit-slice elements of the chip communicate serially to implement a pipeline with a throughput of 50 million multiply/accumulates/s at a 30MHz clock rate.

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来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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