太赫兹CMOS芯片阵列的次谐波无线注入锁定

S. Jameson, E. Halpern, E. Socher
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引用次数: 9

摘要

介绍了一种基于CMOS芯片产生高功率锁频太赫兹辐射的新概念。该概念基于带有片内环形天线的CMOS VCO芯片阵列。在115 GHz左右的基波毫米波振荡下,发射0.35 THz的三次谐波,总辐射功率(TRP)为-4.3 dBm, EIRP为+3.8 dBm, dc -THz效率为1.4%,10 MHz偏移时的相位噪声优于-95 dBc/Hz。使用无缓冲的Colpitts拓扑不仅可以提高输出功率和效率,还可以使用片上天线无线锁定VCO基频,这是该频率的rf扼流圈。这允许集成在板上的阵列CMOS芯片元件之间的无线耦合,用于相互锁定,也可以无线锁定到外部d波段参考。使用1×4 CMOS辐射芯片阵列演示了该概念。源可以在343到347 GHz之间调谐,注入锁定范围在80 MHz左右。1×4阵列的EIRP为+13.8 dBm, TRP和DC-to-THz效率分别为+1 dBm和1.2%。1×4阵列锁定信号遵循外部参考(+9.5 dB)的相位噪声,锁定范围约为80 MHz。这一新概念实现了简单且经济高效的锁定CMOS太赫兹可扩展源阵列。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Sub-harmonic wireless injection locking of a THz CMOS chip array
A novel concept is introduced for generating high power frequency locked THz radiating based on CMOS chips. The concept is based on an array of CMOS VCO chips with on-chip ring antennas. With fundamental mm-wave oscillation around 115 GHz, the 3rd harmonic of 0.35 THz is radiated with record total radiated power (TRP) of -4.3 dBm, EIRP of +3.8 dBm, DC-to-THz efficiency of 1.4% and phase noise better than -95 dBc/Hz at 10 MHz offset. Using a buffer-less Colpitts topology both improves the output power and efficiency but also allows wireless locking of the VCO fundamental frequency using the on-chip antenna, which is an RF-choke for that frequency. This allows wireless coupling between array CMOS chip elements integrated on-board for mutual locking and also wireless locking to an external D-band reference. The concept is demonstrated using a 1×4 array of CMOS radiating chips. The sources can be tuned from 343 to 347 GHz and the injection locking range is around 80 MHz. The 1×4 array has an EIRP of +13.8 dBm, a TRP and DC-to-THz efficiency of +1 dBm and 1.2%, respectively. The 1×4 array locked signal follows the phase noise of the external reference (+9.5 dB) up to a locking range around 80 MHz. This new concept enables simple and cost effective locked CMOS THz scalable source arrays.
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