{"title":"硬件软件协同验证:故障模型和测试生成","authors":"I. Harris","doi":"10.1109/HLDVT.2001.972822","DOIUrl":null,"url":null,"abstract":"The increasing use of hardware-software systems in cost-critical and life-critical applications has led to heightened significance of design correctness of these systems. This paper presents a summary of research in hardware-software covalidation winch involves the verification of design correctness using simulation-based techniques. This paper focuses on the test generation process for hardware-software systems as well as the fault models and fault coverage analysis techniques which support test generation.","PeriodicalId":188469,"journal":{"name":"Sixth IEEE International High-Level Design Validation and Test Workshop","volume":"147 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Hardware-software covalidation: fault models and test generation\",\"authors\":\"I. Harris\",\"doi\":\"10.1109/HLDVT.2001.972822\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The increasing use of hardware-software systems in cost-critical and life-critical applications has led to heightened significance of design correctness of these systems. This paper presents a summary of research in hardware-software covalidation winch involves the verification of design correctness using simulation-based techniques. This paper focuses on the test generation process for hardware-software systems as well as the fault models and fault coverage analysis techniques which support test generation.\",\"PeriodicalId\":188469,\"journal\":{\"name\":\"Sixth IEEE International High-Level Design Validation and Test Workshop\",\"volume\":\"147 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Sixth IEEE International High-Level Design Validation and Test Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HLDVT.2001.972822\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Sixth IEEE International High-Level Design Validation and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2001.972822","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware-software covalidation: fault models and test generation
The increasing use of hardware-software systems in cost-critical and life-critical applications has led to heightened significance of design correctness of these systems. This paper presents a summary of research in hardware-software covalidation winch involves the verification of design correctness using simulation-based techniques. This paper focuses on the test generation process for hardware-software systems as well as the fault models and fault coverage analysis techniques which support test generation.
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